Aspect-driven C to microprocessor ISA or reconfigurable hardware circuit description compiler.
Constructed using the CoSy compiler development system, it relies on code generators for, but not limited to, the MicroBlaze and x86 microprocessors, and VHSIC Hardware Description Language (VHDL).
The compiler was created in the context of the FP7 REFLECT project, integrated in the optimization and code generation phases of an aspect-driven toolchain targetting heterogenerous reconfigurable hardware.
Optimization sequences are determined, as well as individual parameters of optimization engines (e.g. loop ranks and factors for loop unrolling engine), by an aspect-oriented language called LARA.
Responsible: Ricardo Nobre